Mixed-Signal Behavioral Modeling Engineer

The Role

We are seeking a Mixed-Signal Behavioral Modeling Engineer to own the creation of behavioral modeling and drive mixed-signal verification methodology from the ground up. You will be part of a collaborative design team developing state-of-the-art mixed-signal SoCs to be hosted on some of the largest, most powerful, rapidly designed and rapidly manufactured satellites ever deployed in space. Your work will directly influence top-level integration and silicon tapeout success. This is a high-impact, technical role with significant ownership across modeling, methodology, verification, and cross-functional alignment with RF, analog, and digital teams.

Responsibilities

• Develop high-level behavioral models for analog and mixed-signal IP (ADCs, DACs, PLLs, LDOs, RF front-end blocks, biasing, amplifiers, etc.).
• Create abstracted models using Verilog, Verilog-AMS, or SystemVerilog.
• Develop regression infrastructure and mixed-signal testbenches enabling co-simulation (digital + analog).
• Integrate AMS models into digital verification environments (UVM-based).
• Define and build the mixed-signal verification methodology for top-level SoC and subsystem verification.